↧
openBOX VUzero4k
↧
openBOX VUzero
↧
↧
openBOX VUsolo2
↧
openBOX VUduo2
↧
Multistream Vu+ Zero
How to make multistream channel working on Vu+ Zero
↧
↧
OpenplusHD Skin
Skin openplusHD BY-VillaK.MoD.Taina.ro image Open PLi 6.2
Test Lucek Sat
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Test Lucek Sat
↧
Vplug and biss
Hi all
I have strange issue with VPlug
using vplug 2.4.6
i can open tanderburg channels (arena) without problem
now i want to update softcam for biss channels
i choose last softcam file and check the option of keep keys and add only new keys and press convert button..
once i do that arena channels stop and vplug say that key is missing!!
so maybe the vplug delete old keys!!!
i choose tanderburg softcam files and update vplug and the same issue there arena dosent work and error message key is missing (and i can find the key in serach box!!)
can any one have solution for this????
i had to edit softcam file by deleting all softcam keys except biss keys for 3e and 4.8 e
and add softcam file to vplug using same steps and now arena work and biss channels work except only one channel NLO 4.8e !!!
why i have to edit softcam file??
why NLO channel doesnt open
even key is correct but vplug use wrong key as you can see
pic 1 vplug use wrong key
![]()
pic2 correct key is found in database!!!!!
![]()
searched for that worng key in database and replaced it with correct key but NLO will not open plus Arena will stop working!!!
the only way to NLO channel to work is to delete (or move)
v_keys and v_sids files and update vplug softcam
but as you can guess arena sport will stop and vplug will give message say that key is missing even he in database!!!!!
any help?
Thanks
I have strange issue with VPlug
using vplug 2.4.6
i can open tanderburg channels (arena) without problem
now i want to update softcam for biss channels
i choose last softcam file and check the option of keep keys and add only new keys and press convert button..
once i do that arena channels stop and vplug say that key is missing!!
so maybe the vplug delete old keys!!!
i choose tanderburg softcam files and update vplug and the same issue there arena dosent work and error message key is missing (and i can find the key in serach box!!)
can any one have solution for this????
i had to edit softcam file by deleting all softcam keys except biss keys for 3e and 4.8 e
and add softcam file to vplug using same steps and now arena work and biss channels work except only one channel NLO 4.8e !!!
why i have to edit softcam file??
why NLO channel doesnt open
even key is correct but vplug use wrong key as you can see
pic 1 vplug use wrong key
pic2 correct key is found in database!!!!!
searched for that worng key in database and replaced it with correct key but NLO will not open plus Arena will stop working!!!
the only way to NLO channel to work is to delete (or move)
v_keys and v_sids files and update vplug softcam
but as you can guess arena sport will stop and vplug will give message say that key is missing even he in database!!!!!
any help?
Thanks
↧
[BACKUP] BLACKHOLE 3.0.5L für Vu+ UNO 4K SE (VUPLUS4K)
[BACKUP] BLACKHOLE 3.0.5L für Vu+ UNO 4K SE (VUPLUS4K)
SOFTCAM:
CCCAM 2.3.2
/etc
OSCAM 11420
Configuration /etc/tuxbox/config
NCAM5.3
Configuration /etc/tuxbox/config
PICONS
ASTRA 19.2e
HOTBIRD 13.0E
SKINS
MX_HQ10
MX_HQ10XC
MX_HQ10b
MX_HD3
MX_i6+p
SATELLITE
ASTRA 19.2E
HOTBIRD 13.0E
TELNET-FTP
USER : root
PASSWORD : vuplus4k.com
![]()
![]()
![]()
![]()
![]()
![]()
DOWNLOAD
SOFTCAM:
CCCAM 2.3.2
/etc
OSCAM 11420
Configuration /etc/tuxbox/config
NCAM5.3
Configuration /etc/tuxbox/config
PICONS
ASTRA 19.2e
HOTBIRD 13.0E
SKINS
MX_HQ10
MX_HQ10XC
MX_HQ10b
MX_HD3
MX_i6+p
SATELLITE
ASTRA 19.2E
HOTBIRD 13.0E
TELNET-FTP
USER : root
PASSWORD : vuplus4k.com
DOWNLOAD
↧
MTN Sport24HD back
i heard Sport24HD is back working now, any solution is out now?
i think Sony 105.5E and Sport24HD 34.5W all using same way block video, Sony package open in 15days before, Sport24HD open in yesterday.
PM me
i think Sony 105.5E and Sport24HD 34.5W all using same way block video, Sony package open in 15days before, Sport24HD open in yesterday.
PM me
↧
↧
AZ BOX PREMIUM PLUS IN BOOTING
ciao a tutti se qualcuno ha idea di questo risultato e cosa dovrei fare sarebbe il top
xosPe0 serial#cc6b68757c20a94d16aa028554b2c12d subid 0x50
xenv cs2 ok
xosPe0 serial#cc6b68757c20a94d16aa028554b2c12d subid 0x50
xenv cs2 ok
power supply: ok
dram0 ok (8)
dram1 ok (9)
zboot (0) ok
>
**************************************
* SMP863x zboot start ...
* Version: 2.4.0-2.8.0.1
* Started at 0x91000000.
* Configurations (chip revision: 6):
* Use 8KB DRAM as stack.
* Support XLoad format.
* Enabled BIST mode.
* Enabled memory test mode.
* Use internal memory for stage0/1.
**************************************
Boot from flash (0x48000000) mapped to 0x8c000000.
Found XENV block at 0x8c000000.
CPU clock frequency: 300.37MHz.
System clock frequency: 200.25MHz.
DRAM0 dunit_cfg/delay0_ctrl (0xf34111ba/0x000b7787).
DRAM1 dunit_cfg/delay0_ctrl (0xf34111ba/0x000a7787).
Using UART port 0 as console.
Board ID.: "852-E2"
Chip Revision: 0x8634:0x86 .. Matched.
Setting up H/W from XENV block at 0x8c000000.
Setting <SYSCLK avclk_mux> to 0x00000000.
Setting <SYSCLK hostclk_mux> to 0x00000100.
Setting <IRQ rise edge trigger lo> to 0xff28ca00.
Setting <IRQ fall edge trigger lo> to 0x0000c000.
Setting <IRQ rise edge trigger hi> to 0x0000009f.
Setting <IRQ fall edge trigger hi> to 0x00000000.
Setting <IRQ GPIO map> to 0x20090820.
Setting <PB default timing> to 0x10101010.
Setting <PB timing0> to 0x10101010.
Setting <PB Use timing0> to 0x000003f4.
Setting <PB timing1> to 0x00110101.
Setting <PB Use timing1> to 0x000003f3.
Setting <PB timing2> to 0x105f1010.
Setting <PB Use timing2> to 0x000003f8.
PB cs config: 0x000e0040 (use 0x000e0040)
Enabled Devices: 0x00021ace
BM/IDE PCIHost Ethernet I2CM I2CS USB PCIDev2 PCIDev3 SCARD
MAC: 00:02:14:18:61:17
PCI IRQ routing:
IDSEL 2: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 3: INTA(#15) INTB(#15) INTC(#15) INTD(#15)
Smartcard pin assignments:
OFF pin = 0
5V pin = 1
CMD pin = 2
Setting up Clean Divider 2 to 96000000Hz.
Setting up Clean Divider 4 to 33333333Hz.
Setting up Clean Divider 5 to 25000000Hz.
Setting up Clean Divider 6 to 20000000Hz.
Setting up Clean Divider 7 to 20000000Hz.
GPIO dir/data = 0x76000038/0x76000000
UART0 GPIO mode/dir/data = 0x6e/0x00/0x00
UART1 GPIO mode/dir/data = 0x6e/0x00/0x00
XENV block processing completed.
Found existing memcfg: DRAM0(0x08000000), DRAM1(0x08000000)
Heap/Temp/Temp1/Dest start at 0x14000000/0x16000000/0x15000000/0x12000000.
Default boot index: 0
Scanning ROMFS image at 0x8c040000 (0x48040000) .. Found.
ROMFS found at 0x8c040000, Volume name = YAMON_XRPC
Found 1 file(s) to be processed in ROMFS.
Processing xrpc_xload_yamon_ES4_prod.bin (start: 0x8c040090, size: 0x0002fe84)
Checking zboot file signature .. Not found.
Trying xrpc_xload format .. OK
Checking zboot file signature at 0x13000000 .. OK
Decompressing to 0x91200000 .. OK (453328/0x6ead0).
Load time total 173/255 msec.
Execute final at 0x91200000 ..
**********************************
* YAMON ROM Monitor
* Revision 02.06-SIGMADESIGNS-01-2.8.0.1
**********************************
Memory: code: 0x11000000-0x11040000, 0x11200000-0x11204000
reserved data: 0x11240000-0x12440000, PCI memory: 0x12440000-0x12840000
Environment variable 'start' exists. After 1 seconds
it will be interpreted as a YAMON command and executed.
Press Ctrl-C (or do BREAK) to bypass this.
xrpc failed (9)--- if a xtask is using a cipher or if you reboot
--- xrpc will fail with RM_BUSY
Checking zboot signature.. it's not zboot file.
Error : Internal, code = ffffffff
YAMON> setxenv
(0x00) 4 a.avclk_mux 0x00000000
(0x00) 8 a.board_id "852-E2"
(0x00) 4 a.cd2_freq 0x05b8d800
(0x00) 4 a.cd4_freq 0x01fca055
(0x00) 4 a.cd5_freq 0x017d7840
(0x00) 4 a.cd6_freq 0x01312d00
(0x00) 4 a.cd7_freq 0x01312d00
(0x00) 4 a.chip_rev 0x86340086
(0x00) 4 a.enable_devices 0x00021ace
(0x00) 4 a.gpio_data 0x76000000
(0x00) 4 a.gpio_dir 0x76000038
(0x00) 4 a.gpio_irq_map 0x20090820
(0x00) 4 a.hostclk_mux 0x00000100
(0x00) 4 a.irq_fall_edge_hi 0x00000000
(0x00) 4 a.irq_fall_edge_lo 0x0000c000
(0x00) 4 a.irq_rise_edge_hi 0x0000009f
(0x00) 4 a.irq_rise_edge_lo 0xff28ca00
(0x00) 4 a.pb_cs_config 0x000e0040
(0x00) 4 a.pb_def_timing 0x10101010
(0x00) 4 a.pb_timing0 0x10101010
(0x00) 4 a.pb_timing1 0x00110101
(0x00) 4 a.pb_timing2 0x105f1010
(0x00) 4 a.pb_use_timing0 0x000003f4
(0x00) 4 a.pb_use_timing1 0x000003f3
(0x00) 4 a.pb_use_timing2 0x000003f8
(0x00) 4 a.pcidev1_irq_route 0x01010101
(0x00) 4 a.pcidev2_irq_route 0x01010101
(0x00) 4 a.pcidev3_irq_route 0x02020202
(0x00) 4 a.pcidev4_irq_route 0x02020202
(0x00) 4 a.scard_5v_pin 0x00000001
(0x00) 4 a.scard_cmd_pin 0x00000002
(0x00) 4 a.scard_off_pin 0x00000000
(0x00) 4 a.uart0_baudrate 0x0001c200
(0x00) 4 a.uart0_gpio_data 0x00000000
(0x00) 4 a.uart0_gpio_dir 0x00000000
(0x00) 4 a.uart0_gpio_mode 0x00007f6e
(0x00) 4 a.uart1_baudrate 0x00002580
(0x00) 4 a.uart1_gpio_data 0x00000000
(0x00) 4 a.uart1_gpio_dir 0x00000000
(0x00) 4 a.uart1_gpio_mode 0x00007f6e
(0x00) 4 a.uart_console_port 0x00000000
(0x00) 4 a.uart_used_ports 0x00000002
(0x00) 4 l.cs0_size 0x00000000
(0x00) 4 l.cs1_size 0x00000000
(0x00) 4 l.cs2_part1_offset 0x00000000
(0x00) 4 l.cs2_part1_size 0x00020000
(0x00) 4 l.cs2_part2_offset 0x00020000
(0x00) 4 l.cs2_part2_size 0x00020000
(0x00) 4 l.cs2_part3_offset 0x00040000
(0x00) 4 l.cs2_part3_size 0x00040000
(0x00) 4 l.cs2_part4_offset 0x00080000
(0x00) 4 l.cs2_part4_size 0x00680000
(0x00) 4 l.cs2_part5_offset 0x00700000
(0x00) 4 l.cs2_part5_size 0x00100000
(0x00) 4 l.cs2_parts 0x00000005
(0x00) 4 l.cs2_size 0x00800000
(0x00) 4 l.cs3_size 0x00000000
(0x00) 4 x.boot 0x00020000
(0x00) 4 x.csf 0x00000002
(0x00) 4 x.d0.cfg 0xf34111ba
(0x00) 4 x.d0.dl0 0x000a4444
(0x00) 4 x.d1.cfg 0xf34111ba
(0x00) 4 x.d1.dl0 0x000a4444
(0x00) 4 x.ds 0x00020080
(0x00) 4 x.dt 0x00000001
(0x00) 4 x.mux 0x00000701
(0x00) 3 y.startdelay "1"
(0x00) 4 z.boot0 0x00040000
(0x00) 4 z.boot1 0x00080000
(0x00) 4 z.boot2 0x00040000
(0x00) 4 z.boot3 0x00080000
(0x00) 16 a.build_date "TD210:20090123"
(0x00) 31 a.linux_cmd "mem=108m console=ttyS0,115200"
(0x00) 19 a.eth_mac "00.02.14.18.61.17"
(0x00) 40 y.start xrpc 0xac080090; load zbf 0xb3000000; go
(0x00) 4 x.p113 0x01020057
(0x00) 4 x.pll3 0x01020057
(0x00) 14 y.ipaddr "192.168.1.20"
(0x00) 15 y.subnetmask "255.255.255.0"
(0x00) 13 y.gateway "192.168.1.1"
80 records, 1722 bytes
YAMON> setxenv -b x.pll3 0x01020057
Original value: 0x01020057, New value: 0x01020057
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv ipaddr 192.168.1.20
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv subnetmask 255.255.255.0
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv gateway 192.168.1.1
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> net init
Ethernet driver for EM86XX (v1.0)
(MAC 00:02:14:18:61:17, tx_desc/rx_desc = 16/32)
em86xx_eth:pen(em86xx_eth) - Full-duplex mode
em86xx_eth:pen(em86xx_eth) - 100 Mbit/s
em86xx_eth ethernet start
ipaddr: 192.168.1.20
subnetmask: 255.255.255.0
gateway: 192.168.1.1
YAMON> net up
em86xx_eth ethernet start
YAMON> ping 192.168.1.20
64 bytes ICMP-ECHO-REPLY user data received from 192.168.1.20
YAMON>
e qui che ho ridato ip al decoder ...dovrei inviare il karner nuovo ma nn riesco a collegarmi con filezzilla.....
Ne con altri tool... boo
a breve ci tiro una martellATA
xosPe0 serial#cc6b68757c20a94d16aa028554b2c12d subid 0x50
xenv cs2 ok
xosPe0 serial#cc6b68757c20a94d16aa028554b2c12d subid 0x50
xenv cs2 ok
power supply: ok
dram0 ok (8)
dram1 ok (9)
zboot (0) ok
>
**************************************
* SMP863x zboot start ...
* Version: 2.4.0-2.8.0.1
* Started at 0x91000000.
* Configurations (chip revision: 6):
* Use 8KB DRAM as stack.
* Support XLoad format.
* Enabled BIST mode.
* Enabled memory test mode.
* Use internal memory for stage0/1.
**************************************
Boot from flash (0x48000000) mapped to 0x8c000000.
Found XENV block at 0x8c000000.
CPU clock frequency: 300.37MHz.
System clock frequency: 200.25MHz.
DRAM0 dunit_cfg/delay0_ctrl (0xf34111ba/0x000b7787).
DRAM1 dunit_cfg/delay0_ctrl (0xf34111ba/0x000a7787).
Using UART port 0 as console.
Board ID.: "852-E2"
Chip Revision: 0x8634:0x86 .. Matched.
Setting up H/W from XENV block at 0x8c000000.
Setting <SYSCLK avclk_mux> to 0x00000000.
Setting <SYSCLK hostclk_mux> to 0x00000100.
Setting <IRQ rise edge trigger lo> to 0xff28ca00.
Setting <IRQ fall edge trigger lo> to 0x0000c000.
Setting <IRQ rise edge trigger hi> to 0x0000009f.
Setting <IRQ fall edge trigger hi> to 0x00000000.
Setting <IRQ GPIO map> to 0x20090820.
Setting <PB default timing> to 0x10101010.
Setting <PB timing0> to 0x10101010.
Setting <PB Use timing0> to 0x000003f4.
Setting <PB timing1> to 0x00110101.
Setting <PB Use timing1> to 0x000003f3.
Setting <PB timing2> to 0x105f1010.
Setting <PB Use timing2> to 0x000003f8.
PB cs config: 0x000e0040 (use 0x000e0040)
Enabled Devices: 0x00021ace
BM/IDE PCIHost Ethernet I2CM I2CS USB PCIDev2 PCIDev3 SCARD
MAC: 00:02:14:18:61:17
PCI IRQ routing:
IDSEL 2: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 3: INTA(#15) INTB(#15) INTC(#15) INTD(#15)
Smartcard pin assignments:
OFF pin = 0
5V pin = 1
CMD pin = 2
Setting up Clean Divider 2 to 96000000Hz.
Setting up Clean Divider 4 to 33333333Hz.
Setting up Clean Divider 5 to 25000000Hz.
Setting up Clean Divider 6 to 20000000Hz.
Setting up Clean Divider 7 to 20000000Hz.
GPIO dir/data = 0x76000038/0x76000000
UART0 GPIO mode/dir/data = 0x6e/0x00/0x00
UART1 GPIO mode/dir/data = 0x6e/0x00/0x00
XENV block processing completed.
Found existing memcfg: DRAM0(0x08000000), DRAM1(0x08000000)
Heap/Temp/Temp1/Dest start at 0x14000000/0x16000000/0x15000000/0x12000000.
Default boot index: 0
Scanning ROMFS image at 0x8c040000 (0x48040000) .. Found.
ROMFS found at 0x8c040000, Volume name = YAMON_XRPC
Found 1 file(s) to be processed in ROMFS.
Processing xrpc_xload_yamon_ES4_prod.bin (start: 0x8c040090, size: 0x0002fe84)
Checking zboot file signature .. Not found.
Trying xrpc_xload format .. OK
Checking zboot file signature at 0x13000000 .. OK
Decompressing to 0x91200000 .. OK (453328/0x6ead0).
Load time total 173/255 msec.
Execute final at 0x91200000 ..
**********************************
* YAMON ROM Monitor
* Revision 02.06-SIGMADESIGNS-01-2.8.0.1
**********************************
Memory: code: 0x11000000-0x11040000, 0x11200000-0x11204000
reserved data: 0x11240000-0x12440000, PCI memory: 0x12440000-0x12840000
Environment variable 'start' exists. After 1 seconds
it will be interpreted as a YAMON command and executed.
Press Ctrl-C (or do BREAK) to bypass this.
xrpc failed (9)--- if a xtask is using a cipher or if you reboot
--- xrpc will fail with RM_BUSY
Checking zboot signature.. it's not zboot file.
Error : Internal, code = ffffffff
YAMON> setxenv
(0x00) 4 a.avclk_mux 0x00000000
(0x00) 8 a.board_id "852-E2"
(0x00) 4 a.cd2_freq 0x05b8d800
(0x00) 4 a.cd4_freq 0x01fca055
(0x00) 4 a.cd5_freq 0x017d7840
(0x00) 4 a.cd6_freq 0x01312d00
(0x00) 4 a.cd7_freq 0x01312d00
(0x00) 4 a.chip_rev 0x86340086
(0x00) 4 a.enable_devices 0x00021ace
(0x00) 4 a.gpio_data 0x76000000
(0x00) 4 a.gpio_dir 0x76000038
(0x00) 4 a.gpio_irq_map 0x20090820
(0x00) 4 a.hostclk_mux 0x00000100
(0x00) 4 a.irq_fall_edge_hi 0x00000000
(0x00) 4 a.irq_fall_edge_lo 0x0000c000
(0x00) 4 a.irq_rise_edge_hi 0x0000009f
(0x00) 4 a.irq_rise_edge_lo 0xff28ca00
(0x00) 4 a.pb_cs_config 0x000e0040
(0x00) 4 a.pb_def_timing 0x10101010
(0x00) 4 a.pb_timing0 0x10101010
(0x00) 4 a.pb_timing1 0x00110101
(0x00) 4 a.pb_timing2 0x105f1010
(0x00) 4 a.pb_use_timing0 0x000003f4
(0x00) 4 a.pb_use_timing1 0x000003f3
(0x00) 4 a.pb_use_timing2 0x000003f8
(0x00) 4 a.pcidev1_irq_route 0x01010101
(0x00) 4 a.pcidev2_irq_route 0x01010101
(0x00) 4 a.pcidev3_irq_route 0x02020202
(0x00) 4 a.pcidev4_irq_route 0x02020202
(0x00) 4 a.scard_5v_pin 0x00000001
(0x00) 4 a.scard_cmd_pin 0x00000002
(0x00) 4 a.scard_off_pin 0x00000000
(0x00) 4 a.uart0_baudrate 0x0001c200
(0x00) 4 a.uart0_gpio_data 0x00000000
(0x00) 4 a.uart0_gpio_dir 0x00000000
(0x00) 4 a.uart0_gpio_mode 0x00007f6e
(0x00) 4 a.uart1_baudrate 0x00002580
(0x00) 4 a.uart1_gpio_data 0x00000000
(0x00) 4 a.uart1_gpio_dir 0x00000000
(0x00) 4 a.uart1_gpio_mode 0x00007f6e
(0x00) 4 a.uart_console_port 0x00000000
(0x00) 4 a.uart_used_ports 0x00000002
(0x00) 4 l.cs0_size 0x00000000
(0x00) 4 l.cs1_size 0x00000000
(0x00) 4 l.cs2_part1_offset 0x00000000
(0x00) 4 l.cs2_part1_size 0x00020000
(0x00) 4 l.cs2_part2_offset 0x00020000
(0x00) 4 l.cs2_part2_size 0x00020000
(0x00) 4 l.cs2_part3_offset 0x00040000
(0x00) 4 l.cs2_part3_size 0x00040000
(0x00) 4 l.cs2_part4_offset 0x00080000
(0x00) 4 l.cs2_part4_size 0x00680000
(0x00) 4 l.cs2_part5_offset 0x00700000
(0x00) 4 l.cs2_part5_size 0x00100000
(0x00) 4 l.cs2_parts 0x00000005
(0x00) 4 l.cs2_size 0x00800000
(0x00) 4 l.cs3_size 0x00000000
(0x00) 4 x.boot 0x00020000
(0x00) 4 x.csf 0x00000002
(0x00) 4 x.d0.cfg 0xf34111ba
(0x00) 4 x.d0.dl0 0x000a4444
(0x00) 4 x.d1.cfg 0xf34111ba
(0x00) 4 x.d1.dl0 0x000a4444
(0x00) 4 x.ds 0x00020080
(0x00) 4 x.dt 0x00000001
(0x00) 4 x.mux 0x00000701
(0x00) 3 y.startdelay "1"
(0x00) 4 z.boot0 0x00040000
(0x00) 4 z.boot1 0x00080000
(0x00) 4 z.boot2 0x00040000
(0x00) 4 z.boot3 0x00080000
(0x00) 16 a.build_date "TD210:20090123"
(0x00) 31 a.linux_cmd "mem=108m console=ttyS0,115200"
(0x00) 19 a.eth_mac "00.02.14.18.61.17"
(0x00) 40 y.start xrpc 0xac080090; load zbf 0xb3000000; go
(0x00) 4 x.p113 0x01020057
(0x00) 4 x.pll3 0x01020057
(0x00) 14 y.ipaddr "192.168.1.20"
(0x00) 15 y.subnetmask "255.255.255.0"
(0x00) 13 y.gateway "192.168.1.1"
80 records, 1722 bytes
YAMON> setxenv -b x.pll3 0x01020057
Original value: 0x01020057, New value: 0x01020057
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv ipaddr 192.168.1.20
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv subnetmask 255.255.255.0
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> setenv gateway 192.168.1.1
Updating XENV block at 0x48000000.
.
XENV verification OK.
YAMON> net init
Ethernet driver for EM86XX (v1.0)
(MAC 00:02:14:18:61:17, tx_desc/rx_desc = 16/32)
em86xx_eth:pen(em86xx_eth) - Full-duplex mode
em86xx_eth:pen(em86xx_eth) - 100 Mbit/s
em86xx_eth ethernet start
ipaddr: 192.168.1.20
subnetmask: 255.255.255.0
gateway: 192.168.1.1
YAMON> net up
em86xx_eth ethernet start
YAMON> ping 192.168.1.20
64 bytes ICMP-ECHO-REPLY user data received from 192.168.1.20
YAMON>
e qui che ho ridato ip al decoder ...dovrei inviare il karner nuovo ma nn riesco a collegarmi con filezzilla.....
Ne con altri tool... boo
a breve ci tiro una martellATA
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pli-images for the Dreambox 920UHD 900UHD
Good morning new Firmwares for the Dreambox 920 UHD 900 UHD Orginal Img already has the teletext to work
http://www.pli-images.net/images/index.php
MFg sedutor
1 ANTENA 90 CM ASTRA 19.2°E 1KR/1L/1M/1N
HOT BIRD 13B/13C/13E + ASTRA 23.5°E EST
1 ANTENA HISPASAT 30:0°W SELFSAT H50DQ
( FLACHANTENNE QUATTRO-LNB VERSION )
SAT RECEIVER DREAMBOX DM920 UHD 4K
SAT RECEIVER DREAMBOX DM900 UHD 4K
SAT RECEIVER BWARE RX8900HD COMBO
SAT RECEIVER FERGUSON 253HD COMBO
SAT RECEIVER VUPLUS SOLO UHD 4K
IPTV LG SMARTV WEBOS
IPTV SAMSUNG SMARTV
http://www.pli-images.net/images/index.php
MFg sedutor
1 ANTENA 90 CM ASTRA 19.2°E 1KR/1L/1M/1N
HOT BIRD 13B/13C/13E + ASTRA 23.5°E EST
1 ANTENA HISPASAT 30:0°W SELFSAT H50DQ
( FLACHANTENNE QUATTRO-LNB VERSION )
SAT RECEIVER DREAMBOX DM920 UHD 4K
SAT RECEIVER DREAMBOX DM900 UHD 4K
SAT RECEIVER BWARE RX8900HD COMBO
SAT RECEIVER FERGUSON 253HD COMBO
SAT RECEIVER VUPLUS SOLO UHD 4K
IPTV LG SMARTV WEBOS
IPTV SAMSUNG SMARTV
↧
DM900UHD : OpenPLi 6.2 20180602 (Not Genuine)
DM900UHD : OpenPLi 6.2 20180602 (Not Genuine) for Japhar
openpli-6.2-release-dm900-20180602_Japhar.rootfs.tar.gz
![]()
MEGA Japhar :
Notice:
Dear openPLi, if you say this images are not genuine, then all other images from you are even not genuine. This image is based on all openPLi Source from Github and has no backdoor or other stupid things.
openpli-6.2-release-dm900-20180602_Japhar.rootfs.tar.gz
MEGA Japhar :
Code:
https://mega.nz/#!PQRGWZbb!T7cV6mbiBY-yCplekfJ5sJzvmJetZbIAWrgDDCOWF1wDear openPLi, if you say this images are not genuine, then all other images from you are even not genuine. This image is based on all openPLi Source from Github and has no backdoor or other stupid things.
↧
DM900UHD : OpenPLi 6* IPTV June 2018
DM900UHD : OpenPLi 6* IPTV June 2018 for Original
![]()
- OpenPLi 6* by Japhar Team
- Speed Optimized, much quicker than any previous versions
- Python 2.7.13
- GStreamer 1.14.0.1 Stable
- AC3+/DDP/EAC3 support (On compatible hardware)
- Feeds online (For Wifi/DVB-T Dongles)
- DVB-T USB, Trial Tuner, from JAM (Hauppauge, A867, etc)
- Wifi Realtek, Ralink, Mediatek Supported
- IPTV Support with Built-in
1300 Free To Air FREE IPTV Channels from their broadcaster
100+ VoD Free To Air Public Domain Movies and more coming soon (Charlot, Keaton, etc)
- JAM 5.3 built-in (Plugins/Addons)
- Support by Japhar Team
MEGA Original :
- OpenPLi 6* by Japhar Team
- Speed Optimized, much quicker than any previous versions
- Python 2.7.13
- GStreamer 1.14.0.1 Stable
- AC3+/DDP/EAC3 support (On compatible hardware)
- Feeds online (For Wifi/DVB-T Dongles)
- DVB-T USB, Trial Tuner, from JAM (Hauppauge, A867, etc)
- Wifi Realtek, Ralink, Mediatek Supported
- IPTV Support with Built-in
1300 Free To Air FREE IPTV Channels from their broadcaster
100+ VoD Free To Air Public Domain Movies and more coming soon (Charlot, Keaton, etc)
- JAM 5.3 built-in (Plugins/Addons)
- Support by Japhar Team
MEGA Original :
Code:
https://mega.nz/#!DEYRyDKS!wAORJQzWMKXtnFK_o6Hei-_6e_RRbx_dtA9wJuZmzE8↧
↧
Amiko mini combo i m3u
Da li je moguce ubaciti tj ucitati M3U URL u amiko mini combo vidim da ima ta opcija ?
↧
openten_6.2 fullbackup_VuUno4k by @mika
openten_6.2 fullbackup_VuUno4k by @mika
Alternative SoftCam Manager 2.0-r0.0
emu directory: usr/bin/cam
ncam/oscamemu directory: etc/tuxbox/config
cccam config directory : var/etc
- PowerVu Ok
- Multistream Ok
PowerVU support without stream relay!!!!
EMU:
cccam 2.3.2 atm
oscam_powervu_11420-arm_Powervu
ncam_arm_v5.4-Powervu
Download here
↧
ciplushelper image OpenPLi
The ciplushelper plugin for the latest OpenPLi image
Google Translation
Quotation:
The package name was changed which could be removed from the receiver menu in system plugins. Not everyone uses the console.
The VU + Solo receiver has been added. We need a test. I do not have this receiver.
Plugin for tuners
GI ET11000
vuduo
vuduo2
vusolo
vusolo2
vusolo4k
vusolose
vuultimo
vuultimo4k
vuuno
vuuno4k
vuuno4kse
vuzero4k
warning
Before installing a new package, you must delete the old one!
To delete versions:
enigma2-plugin-ciplusinstall_1.0-r0-openpli_6.2-release_all.ipk
enigma2-plugin-ciplusinstall_1.1-r0-openpli_6.2-release_all.ipk
in telnet we give the command
Code:
opkg remove enigma2-plugin-ciplusinstall --force-overwrite
To delete a new plugin, the command in telnet
Code:
opkg remove enigma2-plugin-systemplugins-ciplusinstall --force-overwrite
or remove from the menu of the receiver, in the system plugs.
https://www120.zippyshare.com/v/qzW1IcSu/file.html
Google Translation
Quotation:
The package name was changed which could be removed from the receiver menu in system plugins. Not everyone uses the console.
The VU + Solo receiver has been added. We need a test. I do not have this receiver.
Plugin for tuners
GI ET11000
vuduo
vuduo2
vusolo
vusolo2
vusolo4k
vusolose
vuultimo
vuultimo4k
vuuno
vuuno4k
vuuno4kse
vuzero4k
warning
Before installing a new package, you must delete the old one!
To delete versions:
enigma2-plugin-ciplusinstall_1.0-r0-openpli_6.2-release_all.ipk
enigma2-plugin-ciplusinstall_1.1-r0-openpli_6.2-release_all.ipk
in telnet we give the command
Code:
opkg remove enigma2-plugin-ciplusinstall --force-overwrite
To delete a new plugin, the command in telnet
Code:
opkg remove enigma2-plugin-systemplugins-ciplusinstall --force-overwrite
or remove from the menu of the receiver, in the system plugs.
https://www120.zippyshare.com/v/qzW1IcSu/file.html
↧
globo hd-xc1-01
globo hd-xc1-01
I had a problem with this model
Remote control is not available in my country ( rcu 015 )
I need a software to change the value of the remote and be through the flash, whether soft or even a file to change the value of the remote only and all this through the USB
Or a picture of the alternative remote if available
Attached are some pictures of the available remotes in my country
I had a problem with this model
Remote control is not available in my country ( rcu 015 )
I need a software to change the value of the remote and be through the flash, whether soft or even a file to change the value of the remote only and all this through the USB
Or a picture of the alternative remote if available
Attached are some pictures of the available remotes in my country
↧
↧
GScam
Hello guys, just playing with new toy is an Android 7 Magicsee C300 Hybrid, DVB S2, T and C, well the IPTV side with Kodi works great, when I tried the DVB S2 side the Blind Scan it is pretty descent, search online found a hidden menu, in the hidden menu I found Newcam, CCamd, and GScam, I first thought I read it wrong but I checked and it is GScam, below that setting is BI$$, I checked BI$$ entered Keys manually took me a while to understand how that STB works with BI$$ but finally got it working, it needs a lot less info for BI$$ to work, it doesn't need SID only needs the TP Frequency H or V no symbol rate needed and VID is needed, the VID you get it from the channel, just go to the BI$$ channel press info and will tell you the VID, after the VID you enter the keys, all the channels on that TP that uses the same keys work perfectly, I exported what I could but no info at all on how GScam works........................any ideas?
The file I exported it is named by receiver as.............BissAndPowervuKey.cfg..............exactly like that I didn't alter any case sensitive letters.....Thanks in advance TP
The file I exported it is named by receiver as.............BissAndPowervuKey.cfg..............exactly like that I didn't alter any case sensitive letters.....Thanks in advance TP
↧
New QVIART products (Undro 4K, Mini2, Lunix and Lunix3 4K)
Hi Everyone,
I would wish open a new post with each one of the new Qviart products, put the links to download the new STORM(Server free) firmware's, Channel Lists, Recoveries, etc... to help all users possibles and answer any question.
A small introduction of the news Qviart products is:
>QVIART UNDRO 4K (FREE EMU (STORM) + IPTV):
Android 6.0
Kodi
CPU QUAD CORE: ARM CORTEX A53 2.0 GHZ 64 BITS
DVB-S2 4K Satellite Tuner
RAM/FLASH: 2GB DDRR3/ 8GB EMMC
>QVIART MINI2 (FREE EMU (STORM):
The new version of the small box.
- New LINUX ENIGMA 2 products:
>QVIART LUNIX3 4K (Openatv Image):
The new qviart Lunix3 4K is qviart's first Ultra HD receiver. The heart of the Lunix3 is an ultra-fast processor with 12000 DMips, a 4GB Flash and 2GB RAM (RAM). The Lunix3 4K has a fixed DVB-S2 FBC twin tuner and another plug-and-play tuner slot, so the customer can use the Lunix3 for digital HD satellite, cable or antenna reception (DVB-T / T2 HD). The front of the Lunix3 is decorated with a 12 digit VFD display. Behind a front panel hide each a common interface, a smart card slot and a USB slot. The qviart Lunix3 4K is delivered with an Enigma2 operating system. On the back, the box offers numerous connection options. HDMI-out, USB 3.0, network interface, SPDIF, RCA and a RS232 port. (Cy)
>QVIART LINUX (Openatv Image):
With qviart Lunix, qviart enters the world of Linux E2. The Lunix H.265 receiver with its compact and powerful size offers plenty of room for possibilities.
Could anyone help me with this pls?
I would wish open a new post with each one of the new Qviart products, put the links to download the new STORM(Server free) firmware's, Channel Lists, Recoveries, etc... to help all users possibles and answer any question.
A small introduction of the news Qviart products is:
>QVIART UNDRO 4K (FREE EMU (STORM) + IPTV):
Android 6.0
Kodi
CPU QUAD CORE: ARM CORTEX A53 2.0 GHZ 64 BITS
DVB-S2 4K Satellite Tuner
RAM/FLASH: 2GB DDRR3/ 8GB EMMC
>QVIART MINI2 (FREE EMU (STORM):
The new version of the small box.
- New LINUX ENIGMA 2 products:
>QVIART LUNIX3 4K (Openatv Image):
The new qviart Lunix3 4K is qviart's first Ultra HD receiver. The heart of the Lunix3 is an ultra-fast processor with 12000 DMips, a 4GB Flash and 2GB RAM (RAM). The Lunix3 4K has a fixed DVB-S2 FBC twin tuner and another plug-and-play tuner slot, so the customer can use the Lunix3 for digital HD satellite, cable or antenna reception (DVB-T / T2 HD). The front of the Lunix3 is decorated with a 12 digit VFD display. Behind a front panel hide each a common interface, a smart card slot and a USB slot. The qviart Lunix3 4K is delivered with an Enigma2 operating system. On the back, the box offers numerous connection options. HDMI-out, USB 3.0, network interface, SPDIF, RCA and a RS232 port. (Cy)
>QVIART LINUX (Openatv Image):
With qviart Lunix, qviart enters the world of Linux E2. The Lunix H.265 receiver with its compact and powerful size offers plenty of room for possibilities.
Could anyone help me with this pls?
↧
saluti
ciao a tutti ragazzi
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